Class List

Here are the classes, structs, unions and interfaces with brief descriptions:

[detail level 12]

CAllRegisters	Represents a stack layout after a sequence of PUSHFx, PUSHAx
CCpuFeaturesEcx	See: Feature Information Returned in the ECX Register
CCpuFeaturesEdx	See: More on Feature Information Returned in the EDX Register
CCpuid80000008Eax	See: Information Returned by CPUID Instruction
CCr0	See: CONTROL REGISTERS
CCr4	See: CONTROL REGISTERS
CDestructorEntry
CDr6	See: Debug Status Register (DR6)
CDr7	See: Debug Control Register (DR7)
CEptCommonEntry	A structure made up of mutual fields across all EPT entry types
CEptData
CEptPdEntry	See: Format of an EPT Page-Directory Entry (PDE) that References an EPT Page Table
CEptPdLargePageEntry	See: Format of an EPT Page-Directory Entry (PDE) that Maps a 2-MByte Page
CEptPdptEntry	See: Format of an EPT Page-Directory-Pointer-Table Entry (PDPTE) that References an EPT Page Directory
CEptPdptSuperPageEntry	See: Format of an EPT Page-Directory-Pointer-Table Entry (PDPTE) that Maps a 1-GByte Page
CEptPml4Entry	See: Format of an EPT PML4 Entry (PML4E) that References an EPT Page-Directory-Pointer Table
CEptPointer	See: Extended-Page-Table Pointer (EPTP)
CEptPtEntry	See: Format of an EPT Page-Table Entry that Maps a 4-KByte Page
CEptViolationQualification	See: Exit Qualification for EPT Violations
CFlagRegister	See: SYSTEM FLAGS AND FIELDS IN THE EFLAGS REGISTER
CGdtrOrIdtrInstInformation	See: Format of the VM-Exit Instruction-Information Field as Used for LIDT, LGDT, SIDT, or SGDT
CGpRegistersX64	Represents a stack layout after PUSHAQ
CGpRegistersX86	Represents a stack layout after PUSHAD
CGuestContext
CHardwarePteARM	Nt!_HARDWARE_PTE on ARM Windows
CHardwarePteX64	Nt!_HARDWARE_PTE on x64 Windows
CHardwarePteX86	Nt!_HARDWARE_PTE on x86 PAE-disabled Windows
CHardwarePteX86Pae	Nt!_HARDWARE_PTE on x86 PAE-enabled Windows
CIa32ApicBaseMsr	See: IA32_APIC_BASE MSR Supporting x2APIC
CIa32FeatureControlMsr	See: ARCHITECTURAL MSRS
CIa32MtrrCapabilitiesMsr	See: IA32_MTRRCAP Register
CIa32MtrrDefaultTypeMsr	See: IA32_MTRR_DEF_TYPE MSR
CIa32MtrrFixedRangeMsr	See: Fixed Range MTRRs
CIa32MtrrPhysBaseMsr	See: IA32_MTRR_PHYSBASEn and IA32_MTRR_PHYSMASKn Variable-Range Register Pair
CIa32MtrrPhysMaskMsr	See: IA32_MTRR_PHYSBASEn and IA32_MTRR_PHYSMASKn Variable-Range Register Pair
CIa32VmxBasicMsr	See: BASIC VMX INFORMATION
CIa32VmxEptVpidCapMsr	See: VPID AND EPT CAPABILITIES
CIa32VmxMiscMsr	See: MISCELLANEOUS DATA
CIa32VmxVmcsEnumMsr	See: VMCS ENUMERATION
CIdtr	See: MEMORY-MANAGEMENT REGISTERS
CInsOrOutsInstInformation	See: Format of the VM-Exit Instruction-Information Field as Used for INS and OUTS
CInvEptDescriptor	See: INVEPT Descriptor
CInvEptOrPcidOrVpidInstInformation	See: Format of the VM-Exit Instruction-Information Field as Used for INVEPT, INVPCID, and INVVPID
CInvVpidDescriptor	See: INVVPID Descriptor
CIoInstQualification	See: Exit Qualification for I/O Instructions
CKidtEntry	IDT entry (nt!_KIDTENTRY)
CKidtEntry64	IDT entry for x64 (nt!_KIDTENTRY64)
CLdrDataTableEntry
CLdtrOrTrInstInformation	See: Format of the VM-Exit Instruction-Information Field as Used for LLDT, LTR, SLDT, and STR
CLogBufferInfo
CMovCrQualification	See: Exit Qualification for Control-Register Accesses.
CMovDrQualification	See: Exit Qualification for MOV DR.
CMtrrData
CPaeCr3	Nt!_HARDWARE_PTE on the current platform
CPageFaultErrorCode	See: Page-Fault Error Code
CPdptrRegister	See: PDPTE Registers
▼CPerfCollector	Responsible for collecting and saving data supplied by PerfCounter
CPerfDataEntry	Represents performance data for each location
CScopedLock	Scoped lock
CPerfCounter	Measure elapsed time of the scope
CPhysicalMemoryDescriptor	Represents a physical memory ranges of the system
CPhysicalMemoryRun	Represents ranges of addresses
CProcessorData	Represents VMM related data associated with each processor
CSegmentDescriptor	See: Segment Descriptor
CSegmentDesctiptorX64	See: Segment Descriptor.
CSegmentSelector	See: Segment Selectors
CSharedProcessorData	Represents VMM related data shared across all processors
CVmControlStructure	See: Virtual-Machine Control Structures & FORMAT OF THE VMCS REGION
CVmEntryInterruptionInformationField	See: Format of the VM-Entry Interruption-Information Field
CVmExitHistory
CVmExitInformation	See: Format of Exit Reason in Basic VM-Exit Information
CVmExitInterruptionInformationField	See: Format of the VM-Exit Interruption-Information Field
CVmmInitialStack
CVmxPinBasedControls	See: Definitions of Pin-Based VM-Execution Controls
CVmxProcessorBasedControls	See: Definitions of Primary Processor-Based VM-Execution Controls
CVmxRegmentDescriptorAccessRight	See: Guest Register State
CVmxSecondaryProcessorBasedControls	See: Definitions of Secondary Processor-Based VM-Execution Controls
CVmxVmEntryControls	See: Definitions of VM-Entry Controls
CVmxVmExitControls	See: Definitions of VM-Exit Controls